.ALIASES
C_C1            C1(1=0 2=N00521 ) CN @CHAPTER 4.DeadTime(sch_1):INS482@ANALOG.C.Normal(chips)
V_V1            V1(+=N00514 -=0 ) CN @CHAPTER 4.DeadTime(sch_1):INS725@SOURCE.VPULSE.Normal(chips)
C_C2            C2(1=0 2=N00540 ) CN @CHAPTER 4.DeadTime(sch_1):INS498@ANALOG.C.Normal(chips)
X_U4            U4(1=N00514 2=N00521 3=OUT1 ) CN @CHAPTER 4.DeadTime(sch_1):INS821605@APPLICATION.AND2.Normal(chips)
X_U5            U5(1=N00568 2=N00540 3=OUT2 ) CN @CHAPTER 4.DeadTime(sch_1):INS821643@APPLICATION.AND2.Normal(chips)
X_U3            U3(1=N00514 2=N00568 ) CN @CHAPTER 4.DeadTime(sch_1):INS595@APPLICATION.INV.Normal(chips)
R_R1            R1(1=N00514 2=N00521 ) CN @CHAPTER 4.DeadTime(sch_1):INS432@ANALOG.R.Normal(chips)
R_R2            R2(1=N00568 2=N00540 ) CN @CHAPTER 4.DeadTime(sch_1):INS448@ANALOG.R.Normal(chips)
_    _(Out1=OUT1)
_    _(Out2=OUT2)
.ENDALIASES
